Semiconductor / Chip Fabrication
Also known as: chip fabrication, semiconductor manufacturing, wafer fab, foundry, TSMC, fabless semiconductor
Semiconductor fabrication (chip manufacturing or 'fab') is the industrial process of building computer chips.
Silicon wafers are processed through hundreds of steps -- photolithography (printing circuit patterns using ultraviolet light), chemical vapor deposition (adding material layers), etching (removing material to create features), and doping (adding impurities to control electrical properties) -- to build up layers of transistors, wires, and insulators. The result is a wafer containing hundreds or thousands of identical chips (dies). Chip fabrication requires some of the most precise manufacturing on earth and is concentrated in a small number of specialized foundries (TSMC, Samsung, Intel).
Semiconductor / Chip Fabrication, explained at three levels
At home
Making a computer chip is like building a city in miniature, but on a piece of silicon the size of a fingernail. Factory workers start with a thin, mirror-smooth silicon disc (wafer). Then, using an extremely precise photographic process, they 'print' circuit patterns onto the silicon, layer by layer, building up the transistors and connections that make the chip work. This process repeats hundreds of times, with each layer adding more circuit elements. A single fabrication facility (called a fab or foundry) costs $20 billion or more to build and operates in ultra-clean rooms where even a single dust particle would ruin the chips.
At work
The chip fabrication industry is highly concentrated: only three companies (TSMC, Samsung, Intel) can manufacture chips at the most advanced nodes (below 5nm). Apple, Nvidia, AMD, and Qualcomm design their own chips but contract TSMC or Samsung to manufacture them (the 'fabless' model). This concentration creates supply chain risks: the 2020-2022 chip shortage disrupted automotive production, consumer electronics, and industrial equipment globally when pandemic demand spikes exceeded fabrication capacity. Supply chain resilience discussions in any hardware-dependent industry need to account for the limited number of advanced chip fabrication facilities worldwide.
At home
The photolithography process at the heart of chip fabrication: a photoresist (light-sensitive chemical) is applied to the silicon wafer; a mask (containing the circuit pattern) is placed above it; UV light is shone through the mask onto the wafer, chemically altering the photoresist in the exposed areas. The altered resist is washed away, exposing the silicon below for etching or deposition. Repeating this process with different masks builds up the multiple layers of a modern chip. EUV (Extreme Ultraviolet) lithography uses 13.5nm wavelength light -- generated by firing lasers at molten tin -- to print features as small as a few nanometers.
At work
Yield rate is the key economic metric in chip fabrication: the percentage of dies on a wafer that function correctly after manufacturing. A single defect (a dust particle, a misaligned layer) can kill an individual die. Larger dies have lower yields because the probability of a defect on a die scales with die area. This is why chipmakers (especially AMD and Apple) have moved to chiplet architectures -- manufacturing multiple smaller dies and connecting them on a package rather than one large monolithic die. Smaller dies have better yields and can mix process nodes (e.g., compute chiplets on leading-edge 3nm, I/O chiplets on mature 6nm).
At home
The EUV supply chain as a strategic chokepoint: ASML (Netherlands) is the sole manufacturer of EUV lithography machines, which are essential for fabricating chips below approximately 7nm. Each machine costs around $200M and contains components from suppliers in more than 40 countries. The US export controls on ASML machines to China (implemented 2019-2023) effectively limit Chinese chipmakers to fabricating at 7nm and above. This export control strategy reflects a broader geopolitical recognition that advanced semiconductor fabrication equipment is a strategic resource. The concentration of EUV manufacturing in a single Dutch company, whose products are themselves dependent on global supply chains, illustrates the interdependence of advanced semiconductor manufacturing.
At work
Advanced packaging as a response to fabrication limits: as transistor scaling slows, advanced packaging technologies (chiplet integration, 2.5D interposers, 3D stacking) allow combining multiple dies into a single package with near-chip-level interconnect density. TSMC's CoWoS (Chip on Wafer on Substrate) packages GPU dies with HBM memory for Nvidia's AI accelerators. Intel's EMIB (Embedded Multi-Die Interconnect Bridge) connects chiplets via a small silicon bridge embedded in the package substrate. These packaging technologies require new design tools, test methodologies, and manufacturing capabilities -- creating a new layer of specialization in the semiconductor supply chain distinct from the wafer fabrication process itself.
Real-world examples
At home
Carlos was curious why his new Apple MacBook with an M-series chip was so much more power-efficient than his previous Intel MacBook. He learned that the M chip is fabricated by TSMC on an advanced process node (3nm or 4nm), while older Intel laptop chips were still on 10nm or 12nm nodes. The more advanced fabrication allowed Apple to pack more capability per unit of power consumed. The difference wasn't just chip design -- it was also which fabrication process was used to manufacture it.
At work
Lena managed supply chain for an industrial electronics manufacturer. During the 2021 chip shortage, her team discovered that a $0.40 microcontroller fabricated on a 40nm mature process node at a second-tier foundry was the production bottleneck for a $3,000 product. Mature process nodes (28nm, 40nm, 65nm) used in industrial, automotive, and appliance applications are manufactured at older fabs with less capacity growth than leading-edge fabs. She learned to qualify alternative chip suppliers using the same mature process node and maintain longer safety stock for components sourced from single-source foundries.
Common confusions
- Many people assume that chip companies like Apple, Nvidia, and AMD manufacture their own chips — The majority of chip companies are 'fabless' -- they design chips but contract manufacturing to dedicated foundries. Apple designs its M and A-series chips but TSMC manufactures them. Nvidia designs its GPUs but TSMC and Samsung manufacture them. AMD designs its CPUs and GPUs but TSMC manufactures them. Only Intel (historically) has both designed and manufactured its own chips, and even Intel now manufactures some products at TSMC. The fabless/foundry model allows chip designers to focus on design without the enormous capital expense of building and operating a fabrication facility.
- Some assume that chip shortages primarily affect high-end consumer electronics — The 2020-2022 chip shortage most severely disrupted industries using mature process node chips -- automotive, industrial equipment, appliances, and medical devices -- rather than high-end consumer electronics. Automotive chips (engine control units, safety sensors, infotainment) are typically manufactured on 28-40nm mature nodes, which have limited capacity because most capital investment goes to leading-edge (sub-7nm) fabs. Automakers halted production of finished vehicles worth thousands of dollars because of the absence of semiconductor chips worth a few dollars each. This revealed that the entire modern economy depends on semiconductor availability, not just the consumer tech sector.
For analysts
Semiconductor supply chain is a critical consideration for any client whose products or operations depend on electronic components. The practical advisory points: supply chain diversification (qualifying multiple chip suppliers using equivalent process nodes) reduces single-source risk; mature process node chips (28-65nm) face different supply dynamics than leading-edge chips and require different procurement strategies; and the concentration of advanced fabrication in Taiwan creates geopolitical risk that boards and executives should understand and plan for. Technology assessments for hardware-dependent businesses should include semiconductor supply chain analysis as a standard component.
History & origin
The first integrated circuits were fabricated in 1958-1959 by Jack Kilby (Texas Instruments) and Robert Noyce (Fairchild Semiconductor). Early chips had only a few transistors; the industry has doubled transistor density roughly every two years through continuous process improvements. The most advanced fabrication today uses extreme ultraviolet (EUV) lithography -- a technology that requires laser-excited plasma to generate UV light and cost billions to develop, limiting access to a handful of global manufacturers. TSMC (Taiwan Semiconductor Manufacturing Company), founded in 1987, pioneered the 'pure-play foundry' model: manufacturing chips designed by other companies rather than designing its own. TSMC now manufactures chips for Apple, Nvidia, AMD, Qualcomm, and hundreds of other companies. The geographic concentration of advanced chip manufacturing in Taiwan has become a major geopolitical concern, driving government-funded fab construction in the US (CHIPS Act), Europe, and Japan.