Chips & Quantum Computing

RISC-V

Also known as: RISC-V ISA, RISC V, RISC-five, open instruction set architecture

RISC-V (pronounced 'risk-five') is an open, royalty-free instruction set architecture, the basic language that software uses to talk to a processor.

Unlike Arm or x86, anyone can design a RISC-V chip without paying licensing fees. While it's often framed as an Arm killer, RISC-V's real impact so far is quieter: it's already inside billions of small controllers, and it's slowly moving up to phones, PCs, and servers.

RISC-V, explained at three levels

At home

Every processor speaks a 'language' of basic commands. Arm and x86 are owned by companies that charge others to use them. RISC-V is like an open language anyone can use for free, so more companies can build their own chips.

At work

RISC-V lets companies design custom processors without paying royalties to Arm or relying on Intel and AMD. It's widely used in small chips inside devices like storage drives, sensors, and wireless controllers.

Real-world examples

At home

Marcus took apart an old hard drive for a school project and read that its controller chip used RISC-V. He was surprised that a processor architecture he'd barely heard of was already inside devices he used every day.

At work

Nadia is an engineering lead at a Canadian company building smart agricultural sensors. Her team chose a RISC-V microcontroller because it had the exact features they needed with no royalties, keeping the cost of each sensor low.

How it compares

featureRISC-VArmx86
LicensingOpen, royalty-freeLicensed from Arm, with royaltiesControlled by Intel and AMD
Common usesEmbedded controllers, growing in other areasPhones, tablets, many laptops and serversPCs and servers
Software ecosystemGrowingLargeLargest for desktops
CustomizationHighLimited unless under an architecture licenceVery limited

RISC-V offers the most freedom; Arm and x86 offer more mature ecosystems.

For analysts

RISC-V is a strategic hedge for hardware companies, not just a cost saving. I'd evaluate it for products where you control the whole software stack, such as embedded devices, before betting on it where third-party software matters.

History & origin

RISC-V began at the University of California, Berkeley, in 2010, created by Krste Asanović, Andrew Waterman, Yunsup Lee, and David Patterson, one of the pioneers of RISC design. The RISC-V Foundation was formed in 2015 to steward the specification, and companies such as SiFive emerged to sell RISC-V designs. In 2020, the organization moved to Switzerland and became RISC-V International, partly to reassure members worried about US trade restrictions. Major firms adopted it for embedded uses, with Nvidia, Western Digital, and others shipping RISC-V cores in their products. The RVA23 profile, ratified in 2024, gave software developers a common target for application processors. In my view, RISC-V's openness is both its superpower and its challenge, because fragmentation is always a risk without a single company in charge.